Embedded DRAM, FLASH & SRAM



Back in university I investigated the additional effort of integrating DRAM in a logic process node and vice versa. The trade offs and emerging memory technologies. The literature summary paper is by no means in a publishable state but it has some interesting points. Happy reading
Abstract
This review paper looks at the current and historicmemory landscape and tries to give an answer to when it make ssense to go off-chip and when to stay on the die with the memory and logic placement. Furthermore it is investigated what the penalties are of chosing a CMOS logic process as the base forthe mixed memory-logic system or if rather a memory process shall be choosen. The novel MRAM technology is also consideredas a possible alternative to FLASH and DRAM.
You can access the full article here: https://www.researchgate.net/publication/378901666_CMOS_versus_DRAM_versus_FLASH_Technology