AlpineLogic
A statically generated blog example using Next.js and Markdown.
"Innovation is the summit; logic is the path."Kraken IO Processor: A pio-like learning project
The Raspberry Pico line of microprocessors quickly became a beloved piece of hardware of hobbyists and in academia. A particularly nice feature that I have not seen anywhere else are the interface protocol engines that allow to do SPI, WS2812b and more with better timing precicion than normal GPIO bit-banging.
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CNC milling an enclosure for TinyTapeout Demo Board
In the future I want to have a design on ideally every TinyTapeout shuttle. To test designs on the go (train, ...) I created a sturdy enclosure from an IKEA cutting board.
OV7670 camera + VGA AXI IPs
Everything works best on the second try. Now I have working OV7670 and VGA blocks that I can reuse in my RISC-V designs or other things
Resistor Color Codes
A free native iOS app that reads 4- and 5-band through-hole resistors the same way the paper decoder wheels do—spin the bands, get the value. Nearly 10k downloads on the App Store.
Lecture: Designing Automotive SoCs in VLSI: Functional Safety and Architectural Insights
I was asked by Gavaskar K. a post-doc I know from University of Heidelberg to do a lecture about System on Chips (SoCs) in the autmotive field. I happily said yes and delivered the lecture to him and his students and faculty at Kumaraguru College of Technologies.
WdgRV: RISC-V watchdog IP headed for open silicon
During the 2025 HeiChips Summer School in Heidelberg I created a small wishbone peripheral that we implemented together with the FAZYRV RISC-V core on a Silicon that was actually taped out!.
PMOD for OV7670 VGA Camera
In an effort to let a RISC-V soft-core see the world (in 640x480px resolution) I designed a quick PCB. You're welcome cluster of BRISKI cores
Small FPGA with 64-threaded RISC-V core?!
I ported the amazing BRISKI Barrel Processor to a very common FPGA that many people have available
Truly random number generator
In the hackathon of the FPGA Ignite SummerSchool of 2024 in Heidelberg my team and me created a true random number generator using ring oscillators.
Embedded DRAM, FLASH & SRAM
Back in university I investigated the additional effort of integrating DRAM in a logic process node and vice versa. The trade offs and emerging memory technologies. The literature summary paper is by no means in a publishable state but it has some interesting points.
Hello World - Example Post
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